A Space-Effective Blaze Interpretation Layer for CompactFlash Frameworks.


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Jesung Kim, Jong Min Kim, Sam H. Noh, Sang Lyul Min and Yookun Cho ... initially created as a sort of information stockpiling gadget utilized as a part of versatile electronic gadgets ...
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A Space-Efficient Flash Translation Layer for CompactFlash Systems Jesung Kim, Jong Min Kim, Sam H. Noh, Sang Lyul Min and Yookun Cho IEEE Transactions on Consumer Electronics 2002 July 4 th , 2007 Speaker: Jinyoung Choi

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Introduction | CompactFlash - initially created as a kind of information stockpiling gadget utilized as a part of versatile electronic gadgets Loading a cf card into standard a95 Internal association of a CompactFlash System CompactFlash model framework

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Introduction | Motivation Coarse grain address interpretation Block-level location mapping Management overhead to maintain interpretation data ↓ Fine grain address interpretation page-level location mapping Efficient in taking care of little size composes ⇒ Combination of the two unique granularities for the better execution

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Introduction | Goal Handling both little size composes and long successive composes productively while restricting the span of SRAM required for mapping purposes Guaranteeing consistency of the put away information even after unforeseen force blackouts

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Background | FTL plans Page-level location interpretation Page is unit of I/O (+) effective (adaptable administration) (- ) a vast SRAM for mapping table Block-level location interpretation Block is an eradicate unit (+) a little SRAM ⇒ ease! (- ) less effective (additional operation required), not ensure consistency Replacement-piece plan Maintain compose history between a unique square and an overhauled square Operation case of different FTL outline plans

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Log Block Scheme | The Log square Data pieces versus Log pieces ※ A specific log square is devoted to stand out information piece !!

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Log Block Scheme | The Log piece Traces of the page overhauls for Block No.12 ⇒ 3 1 0 1 A log square is apportioned from the pool of free squares Incremental redesigns For read operation, the log squares must be checked!! ⇒ for more effective checking, keeping up a page-level mapping table for every log hinder in SRAM Can simply distinguish the page that contains the cutting-edge duplicate of an intelligent page

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Log Block Scheme | Merge operation When every one of the pages in the log piece are expended, recovery process occur by combining the log obstruct with the relating information square Requires n-page read operations, n-page compose operations and two-piece delete operations (n: the quantity of pages per piece) two-piece eradicate ⇒ created one free square Log square consolidation

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Log Block Scheme | Merge operation When every one of the pages in a piece are composed consecutively beginning from the main legitimate page to the keep going consistent page Requires n-page read operations, n-page compose operations and one-piece eradicate operations (n: the quantity of pages per square) one-piece eradicate ⇒ delivered one free square (perfect productivity) Log piece switch

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Log Block Scheme | Merge operation ※ Comparison of union operations Replacement piece blend Cleaning in a LFS

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Log Block Scheme | Map piece consolidate/switch operation ⇒ the mapping of the information piece is changed (∴ Require a redesign to the mapping data.) Map hinders (in glimmer memory) Used to store a mapping table in devoted squares to empower speedier startup and on-interest bringing Organized at the page-level Each page stores an incremental upgrade of the mapping table Map index (in SRAM) The guide of the mapping table Used to find every part of the mapping table put away in guide squares Similar to the conventional two-level page table structure (aside from the out-spot overhaul)

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Log Block Scheme | Map piece Mapping data administrations The upgrades of three mapping table sections can be performed in a solitary compose operation to the guide square ⇒ guarantees consistency of the mapping table notwithstanding when the force goes down at a sudden time

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Performance Evaluation Performance measurements : the quantity of additional eradicate/compose operation

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Performance Evaluation The x-hub : the quantity of additional pieces ( = the quantity of extra physical pieces held for substitution pieces, log squares, free pieces, and guide obstructs) The y-pivot : the quantity of additional delete/compose operations the quantity of additional delete operations = (the quantity of eradicate operations that are performed by the plan under assessment) – (the quantity of eradicate operations from a perfect plan) Cf. perfect plan : plan that performs one eradicate operation for each n-page compose demands The primary wellsprings of additional delete operations : pages left unused, utilization of a free square the quantity of additional compose operations = (the quantity of compose operations performed by the plan under assessment) – (the quantity of page composes asked for from the host) The principle wellsprings of additional compose operations : the pages replicated when union/clean operations are performed

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Performance Evaluation Cf. wear-leveling attributes of the log piece plan

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Conclusion (Contribution 1) Handling both little size composes and long successive composes productively while constraining the measure of SRAM required for mapping purposes ⇒ accomplished by utilizing page-level mapping as a part of "log squares" for little size composes, while piece level mapping for long consecutive composes (Contribution 2) Guaranteeing consistency of the put away information even after unforeseen force blackouts ⇒ accomplished by performing upgrades of mapping data in a solitary nuclear compose operation in devoted pieces, "map pieces"

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References [1] Mendel Rosenblum, John K. Ousterhout, "The Design and Implementation of a Log-Structured File System," ACM Transactions on Computer Systems,1992 [2] Adam Dunkels, Niclas Finne, Joakim Eriksson, and Thiemo Voigt, " Run-Time Dynamic Linking for Reprogramming Wireless Sensor Networks ," In Proceedings of the Fourth ACM Conference on Embedded Networked Sensor Systems,2006 [3] Silberschatz, Galvin, Gagne, Operating System Concepts, Wiley