CE AMPLIFIERSSlide 2
CE AMPLIFIERS The initial step is to set up a working or "Q" point utilizing an appropriate inclination circuit. We will, by method for presentation, utilize an alleged burden line strategy to see the interchange between the circuit and gadget limitations on voltage and current. This will give a graphical examination of enhancer conduct.Slide 3
CE AMPLIFIERS The accompanying (basic) inclination circuit utilizes a solitary resistor R B to alter the base current. It is bad since the emitter/authority streams and consequently the working point (I C , V CE ) shift with β. This will be enhanced with balanced out predisposition circuits at the appropriate time.Slide 4
CE AMPLIFIER, Simple predisposition +V CC I C I B R B R C GNDSlide 5
CE AMPLIFIER, Simple inclination +V CC I C I B R B R C V CE V BE GNDSlide 6
CE AMPLIFIER, Simple inclination To empower us to take a gander at a specific numerical illustration we pick the supply voltage V CC = 5V and R C = 2.5 k ΩSlide 7
CE AMPLIFIER, Simple inclination +5 I C R B 2.5 x 10 3 GNDSlide 8
CE AMPLIFIER, Simple inclination In later examinations an a.c. signal (and an extra load resistor) will be coupled to the d.c. circuit utilizing coupling capacitors . The capacitor qualities are picked so that their impedance (1/ C) is irrelevantly little (zero) at the a.c.(signal) recurrence (or over the working recurrence range). A capacitor goes about as a short out for d.c. what\'s more, the d.c. inclination circuit can be planned freely of the a.c. source and any \'a.c. load\'.Slide 9
CE AMPLIFIER, Simple inclination +5 I C R B 2.5 x 10 3 GNDSlide 10
+V CC I C R C V CE GND CE AMPLIFIER, Simple predisposition From Kirchhoff, for the yield,Slide 11
CE AMPLIFIER, Simple inclination Numerically, 5 - 2.5 x 10 3 I C - V CE =0 Or, modifying, I C = (5 – V CE )/(2.5 x 10 3 ) A plot of I C against V CE is a straight line with slant (– 1/2.5 x 10 3) It is known as a heap line and speaks to the variety of I C with V CE forced by the circuit or load.Slide 12
CE AMPLIFIER, Simple predisposition Another variety of I C with V CE is dictated by the yield trademark.Slide 13
CE AMPLIFIER, Simple inclination Another variety of I C with V CE is dictated by the yield trademark. The two connections can be illuminated graphically for I C and V CE .Slide 14
Thus we ascertain three focuses on the heap line I C = (5 – V CE )/(2.5 x 10 3 ) as I C =0, V CE =5V I C = 1mA, V CE =2.5V V CE =0V, I C =5/2500 A = 2mA. To empower us to plot it on the yield trademark. CE AMPLIFIER, Simple inclinationSlide 15
CE AMPLIFIER, Simple predispositionSlide 16
CE AMPLIFIER, Simple predisposition The locale along the heap line incorporates all focuses amongst immersion and cut-off. The base current I B ought to be boosted the yield voltage swing in the straight area. Remembering that V CE (Sat) 0.2 V and V CE Max = 5V pick the working (Q) point at I B = 10 μ A.Slide 17
CE AMPLIFIER, Simple inclination "Working" or Q point set by d.c. inclination.Slide 18
+V CC I B R B V BE GND CE AMPLIFIER, Simple inclination From Kirchhoff, for the info,Slide 19
CE AMPLIFIER, Simple predisposition Remembering that V BE ~ 0.6 V (the base or information trademark is that of a forward one-sided diode) we can discover R B ~ 440 k Ω.Slide 20
CE AMPLIFIER, Simple inclination An a.c. sign is superimposed on top of the d.c. predisposition level. We are occupied with the voltage and current increases for this a.c. part .Slide 21
V CC I C R L R B V CE R S V S GND CE AMPLIFIER R C Signal information Signal yieldSlide 22
CE AMPLIFIER The Q (d.c. predisposition) estimation of V CE is around 2.5 V The greatest positive sign swing permitted is, thusly (5-2.5) V = 2.5 V (The aggregate The most extreme negative voltage swing permitted is (2.5 –0.2) V =2.3 V The greatest symmetric sign swing about the Q point is dictated by the littler of these, i.e. it is 2.3 V.Slide 23
CE Amplifier To discover the voltage and current additions utilizing the heap line strategy we should utilize the information and yield qualities.Slide 24
CE Amplifier Diode dynamic resistance for signs = 1/slant at Q point! Characterizes transistor input impedance for signs Remember we chose I B = 10 μ ASlide 25
CE Amplifier From the information bend we assess that as I B changes by 5 μ An about the inclination level of 10 μ A then the relating change in V BE is around 0.025 V. When i B =5 μ A, v BE = 0.5875V; when i B =15 μ A, v BE = 0.6125.Slide 26
CE Amplifier From the yield trademark bend we climb and down the heap line to gauge that as I B changes by 5 μ A the relating change in V CE is about –2.5 V. (Note the negative sign!) When i B =5 μ A, v CE = 3.75V; when i B =15 μ A, v CE = 1.25VSlide 27
CE Amplifier From the information bend we evaluate that as I B changes by 5 μ An about the inclination level of 10 μ A then the comparing change in V BE is around 0.025 V. When i B =5 μ A, v BE = 0.5875V; when i B =15 μ A, v BE = 0.6125.Slide 28
CE AMPLIFIER "Working" or Q point set by d.c. inclination.Slide 29
CE Amplifier The CE little flag (a.c.) voltage addition isSlide 30
CE Amplifier From the yield trademark bend we likewise see that as we climb and down the heap line an adjustment in I B of 5 μ A produces a relating change in I C of 5m A. The a.c. signal current increase is 100. This is steady with the perfect trademark uniform line dividing, i.e. β = 100 = steady .Slide 31
CE AMPLIFIER "Working" or Q point set by d.c. inclination.Slide 32
Ideal CE Amplifier Summary The CE voltage and current additions are high The voltage increase is negative, i.e. the yield sign is reversed. The d.c. inclination current sets the sign info impedance of the transistor through the dynamic resistance . I C = β I B ; i C = β i B.Slide 33
Ideal CE Amplifier Summary Two of these announcements: The d.c. inclination current sets the sign information impedance of the transistor through the dynamic resistance . I C = β I B ; i C = β i B. will be utilized to infer our streamlined little flag proportional circuit of the BJT. (It is streamlined in light of the fact that it depends on perfect BJTs)Slide 34
v out v i n R L GND Additional a.c. Load Suppose an a.c. coupled burden R L = 2.5 k Ω is included V CC R CSlide 35
Additional a.c. Load The "battery" supplying the d.c. supply V CC has irrelevant impedance contrasted with alternate resistors, specifically R C. It in this manner introduces a powerful \'short out\' for a.c. signals. The viable a.c. burden is the parallel mix of R C and R L . (From the gatherer C we can experience R C or R L to ground)Slide 36
Additional a.c. load a.c. short by means of d.c. supply R C i C R L GNDSlide 37
Additional a.c. load i C R L R C v ce GNDSlide 38
Additional a.c. Load We now need to build an a.c. load line on the yield trademark. This experiences the working point Q and has incline This is difficult to draw!Slide 39
Additional a.c. Load a.c. load line, drawn with required slant through Q point.Slide 40
Additional a.c. Load The accessible voltage swing and the voltage addition are computed utilizing the a.c. loadline. Symmetric swing decreased to about 1.25 V Voltage increase diminished to about –50.Slide 41
Stabilized Bias Circuits These try to alter the emitter current autonomously of BJT parameter varieties, chiefly in β. This is best accomplished by presenting an emitter resistance and setting the base voltage by means of a resistor system (R 1 , R 2 ) which goes about as a potential divider (gave I B can be expected little)Slide 42
V CC R C R 1 v out R S R 2 R E V S GND Stabilized Bias Circuit Bias piece of the circuit, a.c. source and load capacitor coupled. R E is capacitor by-passed (shorted) for a.c. signalsSlide 43
Stabilized Bias Circuit See gift for a nitty gritty examination of this predisposition circuit We will likewise take a gander at a worked case of a transistor intensifier in light of such a balanced out inclination circuit once we have built up an a.c. equal circuit for the transistor.Slide 44
Stabilized Bias Circuit Finally we give another circuit which gives inclination steadiness utilizing negative input from the gatherer voltage. +V CC R C R B I C D.C gatherer voltage V C I B V BE =0.6 V GNDSlide 45
Stabilized Bias Circuit +V CC I RC R C R B I C D.C authority voltage V C I B V BE =0.6 V GNDSlide 46
Stabilized Bias Circuit +V CC I RC R C R B I C D.C gatherer voltage V C I B V BE =0.6 V GNDSlide 47
For instance, expanding , builds I C which brings down the authority voltage V C and henceforth and I B and I C Stabilized Bias Circuit +V CC R C R B I C D.C gatherer voltage V C I B V BE =0.6 V GND
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