Design Equipment.


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Design Equipment Screen (CRT, LCD,… ) Representation quickening agent Output controller Video Memory (outline support) Show/Illustrations Processor CPU/Memory/Plate … 2 4 3 6 1 5 Cathode Beam Tube (CRT) 1. Fiber (produce heat) 2. Cathode (discharge electrons) 3. Control matrix (control power)
Transcripts
Slide 1

Design Hardware Monitor (CRT, LCD,…) Graphics quickening agent Scan controller Video Memory (edge cushion) Display/Graphics Processor CPU/Memory/Disk …

Slide 2

2 4 3 6 1 5 Cathode Ray Tube (CRT) 1. Fiber (create heat) 2. Cathode (radiate electrons) 3. Control network (control force) 4. Center 6. Phosphor covering 5. Diverter

Slide 3

Color CRT 3 electron firearms, 3 shading phosphor specks at every pixel Color = (red, green, blue) Red = 0 – 100% Green = 0 – 100% Blue = 0 – 100% Black = (0,0,0) White = (1,1,1) Red = (1,0,0) Green = (0,1,0) Blue = (0,0,1) …

Slide 4

Display illustrations utilizing CRT Based on raster-examine TV innovation The screen (and a photo) comprises of discrete pixels, and every pixel has one or different phosphor dabs Raster Scan Display

Slide 5

How to draw a photo? We have one and only electron weapon yet numerous pixels in a photo should be lit simultaneously…

Slide 6

Refresh – the electron firearm needs to return to hit the pixel again before it goes out A privilege new rate relies on upon the property of phosphor covering Phosphor ingenuity : the time it takes for the radiated light to rot to 1/10 of the first force Typical revive rate: 60 – 80 times each second (Hz) (What will happen if invigorating is too moderate or too quick?)

Slide 7

Random Scan Order Old way: The electron weapon will move just over the pixels that presuppose being lit (vector design)

Slide 8

Raster Scan Order What we do now: the electron weapon will look over the pixels from left to right, start to finish ( scanline by scanline )

Slide 9

Raster Scan Order The electron firearm will look over the pixels from left to right, through and through ( scanline by scanline ) Horizontal backtrack

Slide 10

Raster Scan Order The electron firearm will look over the pixels from left to right, start to finish ( scanline by scanline ) Vertical remember

Slide 11

Progressive versus Interweave Progressive: Scan each sweep line Interlace: Scan just every other output line (even - > odd - > even - > odd …) - so the invigorate rate turns out to be twice as quick 0 1 2 3 4 5 Even sweep Odd output

Slide 12

x y Raster Scan Control Scan Controller (feature connector) and edge cradle Scan controller DAC Frame support

Slide 13

Frame Buffer Frame cushion: the memory to hold the pixel power values Properties of an edge cradle that influence the illustrations execution: Size: screen determination Depth: shading level 1 bit/pixel: highly contrasting 8 bits/pixel: 256 levels of dim 24 bits/pixel: 16 million hues Speed: revive speed

Slide 14

Color is costly … At minimum used to be The more shading you need, the more bits you will requirement for every pixel Exercise: 1024 x 1280 screen with 24 bits for each pixel, how extensive is the casing support? 1024 x 1280 x 24/8 = 4M Byte

Slide 15

R G B 0 1 2 3 4 5 6 7 You can in any case have 24 bits in each of the shading table sections 24 bit wide 3 bits/pixel casing cushion Color Lookup Table Say I am a poor man … I just have 3 bits for every pixel But I demand having excellent pictures … Use Color Look Up Table (LUT)

Slide 16

A straightforward illustrations framework Frame cradle can be a fundamental\'s piece memory Scan Controller CPU Main Memory Frame support System transport Problem?

Slide 17

Dedicated memory Video memory: On-board casing cradle: much speedier to get to Scan Controller Frame support CPU Main Memory System transport

Slide 18

Graphics Accelerator Graphics Memory/Frame cushion A committed processor for design preparing Graphics Processor Scan Controller CPU Main Memory System transport

Slide 19

Graphics Accelerator

Slide 20

CPUs versus GPUs

Slide 22

The Graphics Pipeline

Slide 23

Graphics Memory/Frame support Graphics Processor Scan Controller Graphics Bus Interface PCI based innovation Other Peripherals PCI Bus – 132 MB/s System Bus – 800MB/s CPU Main Memory

Slide 24

Graphics Bus Interface (2) PCI Bus turns into the bottleneck! Numerous gadgets are utilizing it There is a great deal of stuff should be transmitted from fundamental memory to design memory (geometry, compositions, and so on) Example: 2M triangle, 90 Bytes each – 180MB > 132 MB (PCI transmission capacity)

Slide 25

Graphics Memory/Frame support Graphics Processor Scan Controller Accelerated Graphics Port (AGP) A devoted transport that permits direct access of primary memory Other Peripherals PCI Bus – 132 MB/s AGP 1x: 518 MB/s Fast!!! CPU Main Memory

Slide 26

AGP 1x is four times as quick contrasted with PCI! (presently we have AGP 8x) No more nearby transport clog! More geometry can be prepared! Direct execution of numerous illustrations operations from primary memory

Slide 27

PCI Express Bandwidth?

Slide 28

Reading and Lab0 Textbook Chapter 1, 2 AGP information: http://developer.intel.com/innovation/agp Lab 0: Compile and run the specimen OpenGL project pos

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