High-K Dielectrics The Future of Silicon Transistors .


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High-K Dielectrics The Future of Silicon Transistors. Matthew Yang EECS 277A Professor Nelson. Outline. Introduction Problem with SiO 2 Solution: High-K Dielectric High-K Dielectric Performance Manufacturing Process Summary. Introduction. Continual size reduction of transistors.
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High-K Dielectrics The Future of Silicon Transistors Matthew Yang EECS 277A Professor Nelson

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Outline Introduction Problem with SiO 2 Solution: High-K Dielectric High-K Dielectric Performance Manufacturing Process Summary

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Introduction Continual size diminishment of transistors. Diminish in channel length. Diminish in door dielectric thickness.

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Introduction Currently, door dielectric moving toward thickness of a couple of particles. Issue: Quantum Mechanics Electron burrowing �  door current spillage With the quantity of transistors on a solitary chip developing exponentially, control scattering turns into a major issue.

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Problem with SiO 2 SiO 2 layer is too thin. 90nm hub has a dielectric thickness of 1.2nm. Low relative dielectric steady. On the off chance that there is to be any expansion in execution, an option must be found. Picture civility of Intel.

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Solution: High-K Dielectric Options: Increase dielectric thickness. Increment relative dielectric steady. High-k dielectrics are a consistent arrangement.

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Solution: High-K Dielectric Problems with high-k/poly-si: Increased edge voltage Image obligingness of Intel.

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Solution: High-K Dielectric Problems with high-k/poly-si: Increased edge voltage Decreased channel portability Image politeness of Intel.

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Solution: High-K Dielectric Replace poly-si entryways with doped, metal doors. Enhanced portability. Picture politeness of Intel. Picture civility of Intel.

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High-K Dielectric Performance with high-k dielectric and metal door: Image kindness of Intel.

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Manufacturing Process Several sorts of high-k dielectric: HfO 2 , ZrO 2 , TiO 2 . Substance vapor statement: Image politeness of Intel.

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Summary As transistors shrivel, a contrasting option to SiO 2 must be found. HfO 2 , in conjunction with metal doors, enhances spillage current, entryway capacitance, and speed. By supplanting SiO2 with HfO2, transistors will have the capacity to keep on shrinking without relinquishing execution.

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Sources Chau, Robert, et. al. "Application of High-K Dielectrics and Metal Gate Electrodes to Enable Silicon and Non-Silicon Logic Nanotechnology." Microelectronic Engineering . Vol.80 (2005): 1-6. Chau, Robert. "Role of High-k Gate Dielectrics and Metal Gate Electrodes in Emerging Nanoelectronic Devices." fourteenth Biennial Conference on Insulating Films on Semiconductors 2005. Leuven, Belgium. 22-24 June 2005. Chau, Robert. "Gate Dielectric Scaling for High-Performance CMOS: from SiO2/PolySi to High-k/Metal-Gate." International Workshop on Gate Insulator 2003. Tokyo, Japan. 6-7 November 2003. Chau, Robert, et. al. "High-k/Metal-Gate Stack and Its MOSFET Characteristics" _IEEE Electron Device Letters_. 25:6 (June 2004): 408-410. Intel (4 November 2003). "Intel\'s High-K/Metal Gate Announcement." Press Release. Recovered on 2008-11-03.

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