Illustrations speeding up.

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Category: Art / Culture
Illustrations quickening A case of line-drawing by the ATI Radeon's 2D design motor Bresenham's calculation Review this iterative calculation for doing a 'scanline transformation' for a straight line It required five parameters: The beginning endpoint organizes: (X0,Y0)
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Illustrations speeding up A sample of line-drawing by the ATI Radeon’s 2D representation motor

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Bresenham’s calculation Recall this iterative calculation for doing a ‘scanline conversion’ for a straight line It obliged five parameters: The beginning endpoint facilitates: (X0,Y0) The completion endpoint arranges: (X1,Y1) The closer view shading for the strong initializing so as to shade line It starts a choice variable errorTerm = 2*deltaY - deltaX;

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Algorithm’s fundamental circle for (int y = Y0, x = X0; x <= X1; x++) { drawPixel( x, y, shading ); if ( errorTerm >= 0 ) { errorTerm += 2*delY; } else { y += 1; errorTerm += 2*(delY – delX); } }

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How much work for CPU? Case: To draw the longest noticeable line (in 1024x768 illustrations mode) will require give or take 10,000 CPU guidelines The circle gets executed once for each of the 1024 level pixels, and every go through that circle requires around ten CPU operations: moves, looks at, branches, includes and subtracts, in addition to the capacity calls

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Is speeding up conceivable? The IBM 8514/A showed up in late 1980s It could do line-drawing (and some other regular design operations) if only a couple of parameters were supplied So as opposed to obliging the CPU to do ten thousand operations, the CPU could do possibly ten operations, then let the 8514/An illustrations motor do whatever remains of the work!

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8514/A Block Diagram Graphics processor RAMDAC VRAM memory LUT DAC Display Monitor Display processor CRT controller Drawing motor CPU ROM PC Bus Interface PC Bus

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ATI enhanced IBM’s 8514/A Various OEM merchants soon presented their own representation quickening agent outlines Because IBM had not discharged subtle elements of its configuration, others needed to make their own particular programming interfaces – all are distinctive Early PC design programming was in this manner NOT convenient between equipment stages

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How does X300 draw lines? To exhibit the line-drawing capacity of our classroom’s Radeon X300 illustrations processors, we composed ‘drawline.cpp’ demo We didn\'t have entry to ATI’s official Radeon programming manual, however we had a few such manuals from different sellers, and we discovered ‘clues’ in source-code records for the Linux Radeon gadget driver

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Programming ideas Our demo-program should first check that it is running on a Radeon-prepared machine It must decide how it can correspond with the Radeon’s design quickening agent Normal VGA registers are at ‘standard’ I/O port-addresses, yet the representation motor is outside the extent of built up benchmarks

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Peripheral Component Interconnect An industry council (drove by Intel) has set up a standard instrument that PC gadget drivers can use to recognize the fringe gadgets that a workstation has, and their systems for correspondence To rearrange the Pre-Boot Execution code, present day PC’s give ROM-BIOS schedules that can be called to distinguish peripherals

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PCI Configuration Space Each fringe gadget has an arrangement of nonvolatile memory-areas which store data about that gadget utilizing a standard format PCI CONFIGURATION HEADER 256 bytes ADDITIONAL PCI CONFIGURATION DATA 1024 bytes This gadget data is gotten to by means of I/O Port-Addresses 0x3C8-0x3CF

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PCI Configuration Header Sixteen longword sections (256 bytes) DEVICE ID VENDOR ID BASE-ADDRESS RESOURCE 0 BASE-ADDRESS RESOURCE 1 BASE-ADDRESS RESOURCE 2 BASE-ADDRESS RESOURCE 3 VENDOR-ID = 0x1002: Advanced Technologies, Incorporated DEVICE-ID = 0x5B60: ATI Radeon X300 representation processor BASE-ADDRESS for RESOURCE 1 is the 2D engine’s I/O port Our ‘findsvga.cpp’ utility will demonstrat to you the PCI Configuration Space for any fringe gadgets of Class 0x030000 (i.e., VGA-good representation cards)

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Interface to PCI BIOS Our ‘dosio.c’ gadget driver (and ‘int86.cpp’ friend code) permit us access to BIOS The PCI BIOS administrations are available (in the Pentium’s virtual-8086 mode) utilizing capacity 0xB1 of programming hinder 0x1A There are a few subfunctions – you can discover documentation online – for instance, Professor Ralf Brown’s Interrupt List

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return_radeon_port_address(); Our demo conjures these PCI ROM-BIOS subfunctions to find which I/O Port our Radeon’s 2D representation motor uses Subfunction 1: Detect BIOS vicinity Subfunction 3: Find Device in a Class Subfunction A: Read Configuration Dword Configuration Dword at balance 0x14 holds I/O Port-Address for 2D representation motor

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The ATI I/O Port Interface iobase + 0 iobase + 4 MM_INDEX MM_DATA You yield a register’s list to the iobase + 0 address Then you have perused or compose access to that enlist at the iobase + 4 address

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Many 2D motor registers! You can scrutinize the ‘radeon.h’ header-record to see names and register-list numbers for the Radeon 2D illustrations quickening agent You could likewise compose a programming circle to include the substance from different balances and along these lines get some thought of which ones seem to hold ‘live’ values (i.e.,hundreds!) Only a little number utilized as a part of line-drawing

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CPU/GPU synchronization Intel Pentium CPU ATI Radeon GPU When CPU off-burdens the work of drawing lines (and doing other regular Graphical operations) tp the Graphics Processing Unit, then this arranges for the CPU to execute different guidelines – however it opens up the likelihood that the CPU will send all the more attracting orders to the GPU, even before the GPU is done doing before charges. Some instrument is expected to keep the GPU from getting to be overpowered by work the CPU sends it. Arrangement is a FIFO for pending orders, in addition to a Status Register

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Engine has 64 FIFO openings Before the CPU starts another drawing summon, it verifies whether there are sufficient free spaces in the charge FIFO for putting away that command’s parameters The CPU can do ‘busy-waiting’ until the GPU reports that enough FIFO openings are prepared to acknowledge new order contentions An option is ‘interrupt-driven’ drawing

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Testing ‘drawline.cpp’ We built up our ‘drawline.cpp’ demo on a Radeon 7000 illustrations card, then tried it on a more up to date and speedier Radeon 9250 Our code worked fine Tonight we should attempt it on the Radeon X300 If these different models of the Radeon are completely perfect with each other, we can anticipate that our demo will work fine on the X300

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Hardware changes? In any case, if any critical contrasts exist in the different Radeon plan eras, then we may find that our ‘drawline’ neglects to perform legitimately on a X300 We would then need to investigate the courses in which Radeon outlines have changed, and attempt to devise ‘fixes’ for any imperfections that we have found in our product application

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In-class activities Try running the ‘drawline.cpp’ application on our classroom or CS Lab workstation: possibly it works fine, perhaps it doesn’t Look at the source-code records for the Linux ‘open-source’ ATI Radeon gadget driver If our ‘drawline’ work alright, check whether you can include code t

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