Number-crunching.


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Review. Number representationsOverflowsFloating point numbersArithmetic rationale units. Unsigned Numbers. 32 bits are availableRange 0..232 - 111012 = 23 22 20 = 1310Upper bound 232
Transcripts
Slide 1

Number-crunching CPSC 321 Computer Architecture Andreas Klappenecker

Slide 2

Overview Number representations Overflows Floating point numbers Arithmetic rationale units

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Unsigned Numbers 32 bits are accessible Range 0..2 32 - 1 1101 2 = 2 3 +2 2 +2 0 = 13 10 Upper bound 2 32 –1 = 4 294 967 295

Slide 4

Number representations What marked whole number representations do you know?

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Signed Numbers Sign-greatness representation MSB speaks to sign, 31bits for size One\'s supplement Use 0..2 31 - 1 for non-negative range Invert all bits for negative numbers Two\'s supplement Same as one\'s supplement with the exception of negative numbers are gotten by reversing all bits and including 1

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Advantages and Disadvantages sign-size representation one\'s supplement representation two\'s supplement representation

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Signed Numbers (3bits)

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Two\'s supplement The unsigned aggregate of a n-bit number its negative yields? Case with 3 bits: 011 2 101 2 1000 2 = 2 n => negate(x) = 2 n - x Explain one\'s supplement

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MIPS 32bit marked numbers 0000 two = 0 ten 0000 0001 two = +1 ten 0000 0010 two = +2 ten ... 0111 1111 1110 two = +2,147,483,646 ten 0111 1111 two = +2,147,483,647 ten 1000 0000 two = –2,147,483,648 ten 1000 0000 0001 two = –2,147,483,647 ten 1000 0000 0010 two = –2,147,483,646 ten ... 1111 1101 two = –3 ten 1111 1110 two = –2 ten 1111 two = –1 ten

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Conversions How would you change over a n-bit number into a 2n-bit number? (Expect two\'s supplement representation)

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Conversions Suppose that you have 3bit two\'s supplement number 101 2 = - 3 Convert into a 6bit two\'s supplement number 111101 2 = - 3 Replicate most noteworthy piece!

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Comparisons What can turn out badly in the event that you incidentally contrast unsigned and marked numbers?

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Comparisons for [un]signed Register $s0 1111 Register $s1 0000 0001 Compare registers (set not exactly) slt $t0, $s0, $s1 yes, since –1 < 1 sltu $t1, $s0, $s1 no, since 2 32 - 1>1

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Addition & Subtraction Just like in review school (convey/get 1s) 0111 0111 0110 + 0110 - 0110 - 0101 Two\'s supplement operations simple subtraction utilizing option of negative numbers 0111 + 1010

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Overflow implies that the outcome is too huge for a limited PC word for instance, including two n-bit numbers does not yield a n-bit number 0111 + 0001 1000 the term flood is to some degree deceiving

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Detecting Overflow No flood while including a positive and a negative number No flood when signs are the same for subtraction Overflow happens when the esteem influences the sign: flood while including two positives yields a negative or, including two negatives gives a positive or, subtract a negative from a positive and get a negative or, subtract a positive from a negative and get a positive

Slide 17

Detecting Overflow

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Effects of Overflow A special case (interfere) happens Control hops to predefined address for exemption Interrupted address is put something aside for conceivable resumption Don\'t generally need to distinguish overflow MIPS directions: addu, addiu, subu note: addiu still sign-amplifies!

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What next? More MIPS get together operations How does an ALU function? Straightforward advanced rationale outline How would we be able to accelerate expansion? Shouldn\'t something be said about augmentation?

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