Prologue to Flash Memory .

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Introduction to Flash Memory. 2006. 11. 15. Mobile Embedded System Lab. Kiseok, Choi. Table of Contents. Stateless PC Flash Memory Basics NAND vs. NOR SLC vs. MLC NAND Flash Memory FTL (Flash Translation Layer) An FTL Design Based on Log Blocks The Log Block The Map Block
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Prologue to Flash Memory 2006. 11. 15. Portable Embedded System Lab. Kiseok, Choi

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Table of Contents Stateless PC Flash Memory Basics NAND versus NOR SLC versus MLC NAND Flash Memory FTL (Flash Translation Layer) A FTL Design Based on Log Blocks The Log Block The Map Block SSD (Solid State Disk) State-of-the-workmanship Technologies Research Issues Summary

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Stateless PC Definition : The PC that has no states, particularly non-unstable states.

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Stateless PC Remove non-unpredictable states Current PC Stateless PC State What\'s in the versatile stockpiling? Working Systems File Systems Private information Applications

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Stateless PC Storage for the states Flash memory is a decent answer for the physical stockpiling. Why streak memory? Speedier get to Shock/Temperature resistance Smaller size Lighter weight Lower control Noiseless (0dB)

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Flash Memory Basics Flash memory A non-unpredictable semiconductor memory gadget Key component : To overwrite information, the memory cell ought to be eradicated first. Sorts of blaze memory NOR Introduced by Intel in 1988 Randomly get to information, similar to a PC\'s principle memory Use for executing program code NAND Introduced by Toshiba in 1989 Smaller and denser. → NAND is better at putting away information. Quicker delete and compose time NOR NAND

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NAND versus NOR Pros of NAND Pros of NOR 1. Littler cell measure 2. Restricted awful squares permitted 3. Quick written work 4. Bring down power utilization 1. Quick arbitrary (read) get to We concentrate on the NAND streak memory! Cons of NAND Cons of NOR 1. Moderate irregular (read) get to 1. Bigger cell measure 2. No terrible squares are permitted 3. Moderate composition 4. Higher power utilization For Code Storage For Mass Storage

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NAND Flash Memory Organization of NAND blaze memory Small-piece streak memory Each page is (512 + 16) bytes in length 32 pages in every square Large-piece streak memory Each page is (2048 + 64) bytes in length 64 pages in every square Page format for little square glimmer memory Block 0 Block 1 Block n - 1 Page 0 512 16 Page 1 Page design for extensive square glimmer memory 2048 64 Page m - 1 chip Main Area Spare Area

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NAND Flash Memory Primitive operations of NAND glimmer memory Read page (chip #, square #, page #) ~20 us Write (program) page (chip #, piece #, page #) ~200 us Erase square (chip #, piece #) ~2 ms

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Flash Memory Flash Memory Flash Memory Flash Memory FTL (Flash Translation Layer) File System File System Read Sectors Write Sectors Read Sectors Write Sectors Mismatch! Perused Sectors Write Sectors Read Write Erase FTL + Device Driver Device Driver +

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FTL (Flash Translation Layer) Definition Software layer that makes streak memory appear to the framework like a circle drive Challenges in FTL Asymmetry in read and compose speeds No overwrite is permitted without deleting

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FTL nuts and bolts Read ask for from upper layer No issue. Compose ask for from upper layer There is an issue. Delete operation must be done first (the eradicate operation is performed in a piece unit) to overwrite information.

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A FTL Design Based on Log Blocks Background 2 sorts of pieces Data square: square level oversaw piece (most) Log piece: page level oversaw obstruct (a couple of) Temporary stockpiling for little size keeps in touch with information pieces Data Block Log Block Write! Information is composed to the log square legitimate substantial legitimate

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A FTL Design Based on Log Blocks Whenever the log piece is full, We have to combine the information square and the log square.

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A FTL Design Based on Log Blocks Merge Operation Log Block Merge Data Block Data Block Free Block Log Block legitimate substantial legitimate substantial Free pieces

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A FTL Design Based on Log Blocks Merge Operation (cont\'d) Log Block Switch Data Block Data Block Log Block legitimate substantial legitimate substantial legitimate Free squares

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A FTL Design Based on Log Blocks Where is the mapping data? Mapping data : sensible deliver to physical address It is put away in guide squares.

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Map Block The Map Block Where to store the mapping data Previous plan: every page/obstruct in the related extra zone as legitimate address labels  requiring examining of the whole space of glimmer memory to gather coherent address labels Map pieces: committed squares to empower speedier startup and on-request bringing  utilizing map hinders as a part of a round robin way Map Directory: the guide of the mapping table in SRAM and is utilized to find every segment of the mapping table put away in guide pieces  the guide index is put away in a saved territory of the blaze memory

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SSD (Solid State Disk) The plate that uses the semiconductor as capacity DRAM-based Flash-based P-ATA/S-ATA interface FTL NAND streak memory Target markets Enterprise server stockpiling Mainstream PC stockpiling

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SSD (Solid State Disk) HYDRA extend 2005.9 ~ Mtron + SNU 3.5 creep building test as of now discharged (PCMark 04)

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State-of-the-craftsmanship Technologies In the viewpoint of the immaculate NAND Copy-back operation Using interior information duplicates, information exchange overhead can be expelled (utilized for consolidation operations). Reserve programming Besides the page enroll, there\'s a store enlist. Utilizing twofold buffering, throughput can be expanded.

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State-of-the-workmanship Technologies In the point of view of new-wrote NAND Hybrid frameworks are proposed. Immaculate NAND is not well reasonable for running applications dynamic/static RAM segment + NAND OneNAND = SRAM + NAND High execution (read/compose) More costly and less vitality productive

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Research Issues How to handle of terrible pieces Initial awful square and run-time awful piece Usually took care of by the "awful square table" technique Wear-Leveling There\'s a cutoff on the quantity of eradicates About 100,000 times Need to delete streak memory pieces equitably How to enhance execution adequately

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Summary Stateless PC will supplant the momentum PC later on. Solid & quick convenient stockpiling is required for non-unpredictable capacity of states. Streak memory is a decent decision for capacity. So the exploration concentrated on the best way to enhance streak memory execution/limit/solidness is required.

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